port.c File Reference


Detailed Description

FreeRTOS port source for AVR32 UC3.

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file GCC/AVR32_UC3/port.c.

#include <malloc.h>
#include "nlao_cpu.h"
#include "nlao_usart.h"
#include "FreeRTOS.h"
#include "task.h"
#include <avr32/io.h>
#include "gpio.h"

Go to the source code of this file.

Defines

#define portINITIAL_SR   ( ( portSTACK_TYPE ) 0x00400000 )
#define portINSTRUCTION_SIZE   ( ( portSTACK_TYPE ) 0 )
#define portNO_CRITICAL_NESTING   ( ( unsigned portLONG ) 0 )

Functions

void __malloc_lock (struct _reent *ptr)
void __malloc_unlock (struct _reent *ptr)
int _init_startup (void)
static void prvClearCcInt (void)
static void prvScheduleFirstTick (void)
static void prvSetupTimerInterrupt (void)
void * pvPortRealloc (void *pv, size_t xWantedSize)
portSTACK_TYPE * pxPortInitialiseStack (portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters)
void SCALLYield (void)
void vPortEndScheduler (void)
void vPortEnterCritical (void)
void vPortExitCritical (void)
static void vTick (void)
portBASE_TYPE xPortStartScheduler (void)

Variables

volatile unsigned portLONG ulCriticalNesting = 9999UL


Define Documentation

#define portINITIAL_SR   ( ( portSTACK_TYPE ) 0x00400000 )

Definition at line 89 of file GCC/AVR32_UC3/port.c.

Referenced by pxPortInitialiseStack().

#define portINSTRUCTION_SIZE   ( ( portSTACK_TYPE ) 0 )

Definition at line 90 of file GCC/AVR32_UC3/port.c.

Referenced by pxPortInitialiseStack().

#define portNO_CRITICAL_NESTING   ( ( unsigned portLONG ) 0 )

Definition at line 93 of file GCC/AVR32_UC3/port.c.

Referenced by pxPortInitialiseStack(), and vPortExitCritical().


Function Documentation

void __malloc_lock ( struct _reent *  ptr  ) 

Definition at line 190 of file GCC/AVR32_UC3/port.c.

References vTaskSuspendAll().

00191 {
00192     vTaskSuspendAll();
00193 }

void __malloc_unlock ( struct _reent *  ptr  ) 

Definition at line 200 of file GCC/AVR32_UC3/port.c.

References xTaskResumeAll().

00201 {
00202     xTaskResumeAll();
00203 }

int _init_startup ( void   ) 

Definition at line 116 of file GCC/AVR32_UC3/port.c.

References configDBG_USART, configDBG_USART_BAUDRATE, configDBG_USART_RX_FUNCTION, configDBG_USART_RX_PIN, configDBG_USART_TX_FUNCTION, configDBG_USART_TX_PIN, configPBA_CLOCK_HZ, ENABLE_ALL_EXCEPTIONS, and portBASE_TYPE.

00117 {
00118     /* Import the Exception Vector Base Address. */
00119     extern void _evba;
00120 
00121     #if configHEAP_INIT
00122         extern void __heap_start__;
00123         extern void __heap_end__;
00124         portBASE_TYPE *pxMem;
00125     #endif
00126 
00127     /* Load the Exception Vector Base Address in the corresponding system register. */
00128     Set_system_register( AVR32_EVBA, ( int ) &_evba );
00129 
00130     /* Enable exceptions. */
00131     ENABLE_ALL_EXCEPTIONS();
00132 
00133     /* Initialize interrupt handling. */
00134     INTC_init_interrupts();
00135 
00136     #if configHEAP_INIT
00137 
00138         /* Initialize the heap used by malloc. */
00139         for( pxMem = &__heap_start__; pxMem < ( portBASE_TYPE * )&__heap_end__; )
00140         {
00141             *pxMem++ = 0xA5A5A5A5;
00142         }
00143 
00144     #endif
00145 
00146     /* Give the used PBA clock frequency to Newlib, so it can work properly. */
00147     set_cpu_hz( configPBA_CLOCK_HZ );
00148 
00149     /* Code section present if and only if the debug trace is activated. */
00150     #if configDBG
00151     {
00152         static const gpio_map_t DBG_USART_GPIO_MAP =
00153         {
00154             { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
00155             { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
00156         };
00157 
00158         /* Initialize the USART used for the debug trace with the configured parameters. */
00159         set_usart_base( ( void * ) configDBG_USART );
00160         gpio_enable_module( DBG_USART_GPIO_MAP,
00161                             sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
00162         usart_init( configDBG_USART_BAUDRATE );
00163     }
00164     #endif
00165 
00166   // Don't-care value for GCC.
00167   return 1;
00168 }

static void prvClearCcInt ( void   )  [static]

Definition at line 353 of file GCC/AVR32_UC3/port.c.

Referenced by vTick().

00354     {
00355         Set_system_register(AVR32_COMPARE, Get_system_register(AVR32_COMPARE));
00356     }

static void prvScheduleFirstTick ( void   )  [static]

Definition at line 347 of file GCC/AVR32_UC3/port.c.

References configCPU_CLOCK_HZ, and configTICK_RATE_HZ.

Referenced by prvSetupTimerInterrupt().

00348     {
00349         Set_system_register(AVR32_COMPARE, configCPU_CLOCK_HZ/configTICK_RATE_HZ);
00350         Set_system_register(AVR32_COUNT, 0);
00351     }

static void prvSetupTimerInterrupt ( void   )  [static]

Definition at line 366 of file GCC/AVR32_UC3/port.c.

References configPBA_CLOCK_HZ, configTICK_RATE_HZ, configTICK_TC_CHANNEL, configTICK_TC_IRQ, portDISABLE_INTERRUPTS, prvScheduleFirstTick(), and vTick().

Referenced by xPortStartScheduler().

00367 {
00368 #if( configTICK_USE_TC==1 )
00369 
00370     volatile avr32_tc_t *tc = &AVR32_TC;
00371 
00372     // Options for waveform genration.
00373     tc_waveform_opt_t waveform_opt =
00374     {
00375     .channel  = configTICK_TC_CHANNEL,             /* Channel selection. */
00376 
00377     .bswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOB. */
00378     .beevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOB. */
00379     .bcpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOB. */
00380     .bcpb     = TC_EVT_EFFECT_NOOP,                /* RB compare effect on TIOB. */
00381 
00382     .aswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOA. */
00383     .aeevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOA. */
00384     .acpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOA: toggle. */
00385     .acpa     = TC_EVT_EFFECT_NOOP,                /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
00386 
00387     .wavsel   = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
00388     .enetrg   = FALSE,                             /* External event trigger enable. */
00389     .eevt     = 0,                                 /* External event selection. */
00390     .eevtedg  = TC_SEL_NO_EDGE,                    /* External event edge selection. */
00391     .cpcdis   = FALSE,                             /* Counter disable when RC compare. */
00392     .cpcstop  = FALSE,                             /* Counter clock stopped with RC compare. */
00393 
00394     .burst    = FALSE,                             /* Burst signal selection. */
00395     .clki     = FALSE,                             /* Clock inversion. */
00396     .tcclks   = TC_CLOCK_SOURCE_TC3                /* Internal source clock 3. */
00397     };
00398 
00399     tc_interrupt_t tc_interrupt =
00400     {
00401         .etrgs=0,
00402         .ldrbs=0,
00403         .ldras=0,
00404         .cpcs =1,
00405         .cpbs =0,
00406         .cpas =0,
00407         .lovrs=0,
00408         .covfs=0,
00409     };
00410 
00411 #endif
00412 
00413     /* Disable all interrupt/exception. */
00414     portDISABLE_INTERRUPTS();
00415 
00416     /* Register the compare interrupt handler to the interrupt controller and
00417     enable the compare interrupt. */
00418 
00419     #if( configTICK_USE_TC==1 )
00420     {
00421         INTC_register_interrupt(&vTick, configTICK_TC_IRQ, AVR32_INTC_INT0);
00422 
00423         /* Initialize the timer/counter. */
00424         tc_init_waveform(tc, &waveform_opt);
00425 
00426         /* Set the compare triggers.
00427         Remember TC counter is 16-bits, so counting second is not possible!
00428         That's why we configure it to count ms. Set Rc to the right value with
00429       rounding.*/
00430         tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ + 4 * configTICK_RATE_HZ ) /
00431                                                 ( 8 * configTICK_RATE_HZ ) );
00432 
00433         tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
00434 
00435         /* Start the timer/counter. */
00436         tc_start(tc, configTICK_TC_CHANNEL);
00437     }
00438     #else
00439     {
00440         INTC_register_interrupt(&vTick, AVR32_CORE_COMPARE_IRQ, AVR32_INTC_INT0);
00441         prvScheduleFirstTick();
00442     }
00443     #endif
00444 }

void* pvPortRealloc ( void *  pv,
size_t  xWantedSize 
)

Definition at line 207 of file GCC/AVR32_UC3/port.c.

00208 {
00209 void *pvReturn;
00210 
00211     vTaskSuspendAll();
00212     {
00213         pvReturn = realloc( pv, xWantedSize );
00214     }
00215     xTaskResumeAll();
00216 
00217     return pvReturn;
00218 }

portSTACK_TYPE* pxPortInitialiseStack ( portSTACK_TYPE *  pxTopOfStack,
pdTASK_CODE  pxCode,
void *  pvParameters 
)

Definition at line 294 of file GCC/AVR32_UC3/port.c.

References portINITIAL_SR, portINSTRUCTION_SIZE, portNO_CRITICAL_NESTING, and portSTACK_TYPE.

00295 {
00296     /* Setup the initial stack of the task.  The stack is set exactly as
00297     expected by the portRESTORE_CONTEXT() macro. */
00298 
00299     /* When the task starts, it will expect to find the function parameter in R12. */
00300     pxTopOfStack--;
00301     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808;                    /* R8 */
00302     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909;                    /* R9 */
00303     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A;                    /* R10 */
00304     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B;                    /* R11 */
00305     *pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters;                  /* R12 */
00306     *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF;                    /* R14/LR */
00307     *pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
00308     *pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR;                /* SR */
00309     *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF;                    /* R0 */
00310     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101;                    /* R1 */
00311     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202;                    /* R2 */
00312     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303;                    /* R3 */
00313     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404;                    /* R4 */
00314     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505;                    /* R5 */
00315     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606;                    /* R6 */
00316     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707;                    /* R7 */
00317     *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING;         /* ulCriticalNesting */
00318 
00319     return pxTopOfStack;
00320 }

void SCALLYield ( void   ) 

Definition at line 249 of file GCC/AVR32_UC3/port.c.

References portRESTORE_CONTEXT_SCALL, portSAVE_CONTEXT_SCALL, and vTaskSwitchContext().

00250 {
00251     /* Save the context of the interrupted task. */
00252     portSAVE_CONTEXT_SCALL();
00253     vTaskSwitchContext();
00254     portRESTORE_CONTEXT_SCALL();
00255 }

void vPortEndScheduler ( void   ) 

Definition at line 337 of file GCC/AVR32_UC3/port.c.

00338 {
00339     /* It is unlikely that the AVR32 port will require this function as there
00340     is nothing to return to.  */
00341 }

void vPortEnterCritical ( void   ) 

Definition at line 262 of file GCC/AVR32_UC3/port.c.

00263 {
00264     /* Disable interrupts */
00265     portDISABLE_INTERRUPTS();
00266 
00267     /* Now interrupts are disabled ulCriticalNesting can be accessed
00268      directly.  Increment ulCriticalNesting to keep a count of how many times
00269      portENTER_CRITICAL() has been called. */
00270     ulCriticalNesting++;
00271 }

void vPortExitCritical ( void   ) 

Definition at line 274 of file GCC/AVR32_UC3/port.c.

00275 {
00276     if(ulCriticalNesting > portNO_CRITICAL_NESTING)
00277     {
00278         ulCriticalNesting--;
00279         if( ulCriticalNesting == portNO_CRITICAL_NESTING )
00280         {
00281             /* Enable all interrupt/exception. */
00282             portENABLE_INTERRUPTS();
00283         }
00284     }
00285 }

static void vTick ( void   )  [static]

Definition at line 225 of file GCC/AVR32_UC3/port.c.

References portENTER_CRITICAL, portEXIT_CRITICAL, portRESTORE_CONTEXT_OS_INT, portSAVE_CONTEXT_OS_INT, prvClearCcInt(), and vTaskIncrementTick().

Referenced by prvSetupTimerInterrupt().

00226 {
00227     /* Save the context of the interrupted task. */
00228     portSAVE_CONTEXT_OS_INT();
00229 
00230     #if( configTICK_USE_TC==1 )
00231         /* Clear the interrupt flag. */
00232         prvClearTcInt();
00233     #else
00234         /* Clear the interrupt flag. */
00235         prvClearCcInt();
00236     #endif
00237 
00238     /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
00239     calls in a critical section . */
00240     portENTER_CRITICAL();
00241         vTaskIncrementTick();
00242     portEXIT_CRITICAL();
00243 
00244     /* Restore the context of the "elected task". */
00245     portRESTORE_CONTEXT_OS_INT();
00246 }

portBASE_TYPE xPortStartScheduler ( void   ) 

Definition at line 323 of file GCC/AVR32_UC3/port.c.

References portRESTORE_CONTEXT, and prvSetupTimerInterrupt().

00324 {
00325     /* Start the timer that generates the tick ISR.  Interrupts are disabled
00326     here already. */
00327     prvSetupTimerInterrupt();
00328 
00329     /* Start the first task. */
00330     portRESTORE_CONTEXT();
00331 
00332     /* Should not get here! */
00333     return 0;
00334 }


Variable Documentation

volatile unsigned portLONG ulCriticalNesting = 9999UL

Definition at line 94 of file GCC/AVR32_UC3/port.c.

Referenced by vPortEnterCritical(), and vPortExitCritical().


Generated on Thu Dec 17 20:02:01 2009 for AVR32 UC3 - FreeRTOS Real Time Kernel by  doxygen 1.5.5