port.c File Reference

Detailed Description

FreeRTOS port source for AVR32 UC3.

Author:
Atmel Corporation: http://www.atmel.com
Support and FAQ: http://support.atmel.no/

Definition in file IAR/AVR32_UC3/port.c.

#include "gpio.h"
#include "FreeRTOS.h"
#include "task.h"
#include <avr32/io.h>
#include <intrinsics.h>

Go to the source code of this file.

Defines

#define portINITIAL_SR   ( ( portSTACK_TYPE ) 0x00400000 )
#define portINSTRUCTION_SIZE   ( ( portSTACK_TYPE ) 0 )
#define portNO_CRITICAL_NESTING   ( ( unsigned portLONG ) 0 )

Functions

int __low_level_init (void)
static void prvClearCcInt (void)
static void prvScheduleFirstTick (void)
static void prvSetupTimerInterrupt (void)
void * pvPortRealloc (void *pv, size_t xWantedSize)
portSTACK_TYPE * pxPortInitialiseStack (portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters)
void SCALLYield (void)
void vPortEndScheduler (void)
void vPortEnterCritical (void)
void vPortExitCritical (void)
static void vTick (void)
portBASE_TYPE xPortStartScheduler (void)

Variables

volatile unsigned portLONG ulCriticalNesting = 9999UL

Define Documentation

#define portINITIAL_SR   ( ( portSTACK_TYPE ) 0x00400000 )

Definition at line 89 of file IAR/AVR32_UC3/port.c.

#define portINSTRUCTION_SIZE   ( ( portSTACK_TYPE ) 0 )

Definition at line 90 of file IAR/AVR32_UC3/port.c.

#define portNO_CRITICAL_NESTING   ( ( unsigned portLONG ) 0 )

Definition at line 93 of file IAR/AVR32_UC3/port.c.

Function Documentation

int __low_level_init ( void   ) 

Definition at line 111 of file IAR/AVR32_UC3/port.c.

References configDBG_USART, configDBG_USART_BAUDRATE, configDBG_USART_RX_FUNCTION, configDBG_USART_RX_PIN, configDBG_USART_TX_FUNCTION, configDBG_USART_TX_PIN, configPBA_CLOCK_HZ, ENABLE_ALL_EXCEPTIONS, portBASE_TYPE, and stdio_usart_base.

00112 {
00113     #if configHEAP_INIT
00114         #pragma segment = "HEAP"
00115         portBASE_TYPE *pxMem;
00116     #endif
00117 
00118     /* Enable exceptions. */
00119     ENABLE_ALL_EXCEPTIONS();
00120 
00121     /* Initialize interrupt handling. */
00122     INTC_init_interrupts();
00123 
00124     #if configHEAP_INIT
00125     {
00126         /* Initialize the heap used by malloc. */
00127         for( pxMem = __segment_begin( "HEAP" ); pxMem < ( portBASE_TYPE * ) __segment_end( "HEAP" ); )
00128         {
00129             *pxMem++ = 0xA5A5A5A5;
00130         }
00131     }
00132     #endif
00133 
00134     /* Code section present if and only if the debug trace is activated. */
00135     #if configDBG
00136     {
00137         static const gpio_map_t DBG_USART_GPIO_MAP =
00138         {
00139             { configDBG_USART_RX_PIN, configDBG_USART_RX_FUNCTION },
00140             { configDBG_USART_TX_PIN, configDBG_USART_TX_FUNCTION }
00141         };
00142 
00143         static const usart_options_t DBG_USART_OPTIONS =
00144         {
00145             .baudrate = configDBG_USART_BAUDRATE,
00146             .charlength = 8,
00147             .paritytype = USART_NO_PARITY,
00148             .stopbits = USART_1_STOPBIT,
00149             .channelmode = USART_NORMAL_CHMODE
00150         };
00151 
00152         /* Initialize the USART used for the debug trace with the configured parameters. */
00153         extern volatile avr32_usart_t *volatile stdio_usart_base;
00154         stdio_usart_base = configDBG_USART;
00155         gpio_enable_module( DBG_USART_GPIO_MAP,
00156                             sizeof( DBG_USART_GPIO_MAP ) / sizeof( DBG_USART_GPIO_MAP[0] ) );
00157         usart_init_rs232(configDBG_USART, &DBG_USART_OPTIONS, configPBA_CLOCK_HZ);
00158     }
00159     #endif
00160 
00161     /* Request initialization of data segments. */
00162     return 1;
00163 }

static void prvClearCcInt ( void   )  [static]

Definition at line 318 of file IAR/AVR32_UC3/port.c.

00319     {
00320         Set_system_register(AVR32_COMPARE, Get_system_register(AVR32_COMPARE));
00321     }

static void prvScheduleFirstTick ( void   )  [static]

Definition at line 311 of file IAR/AVR32_UC3/port.c.

References configCPU_CLOCK_HZ, and configTICK_RATE_HZ.

00312     {
00313         Set_system_register(AVR32_COMPARE, configCPU_CLOCK_HZ/configTICK_RATE_HZ);
00314         Set_system_register(AVR32_COUNT, 0);
00315     }

static void prvSetupTimerInterrupt ( void   )  [static]

Definition at line 332 of file IAR/AVR32_UC3/port.c.

References configPBA_CLOCK_HZ, configTICK_RATE_HZ, configTICK_TC_CHANNEL, configTICK_TC_IRQ, portDISABLE_INTERRUPTS, prvScheduleFirstTick(), and vTick().

00333 {
00334     #if( configTICK_USE_TC==1 )
00335 
00336         volatile avr32_tc_t *tc = &AVR32_TC;
00337 
00338         // Options for waveform genration.
00339         tc_waveform_opt_t waveform_opt =
00340         {
00341         .channel  = configTICK_TC_CHANNEL,             /* Channel selection. */
00342 
00343         .bswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOB. */
00344         .beevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOB. */
00345         .bcpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOB. */
00346         .bcpb     = TC_EVT_EFFECT_NOOP,                /* RB compare effect on TIOB. */
00347 
00348         .aswtrg   = TC_EVT_EFFECT_NOOP,                /* Software trigger effect on TIOA. */
00349         .aeevt    = TC_EVT_EFFECT_NOOP,                /* External event effect on TIOA. */
00350         .acpc     = TC_EVT_EFFECT_NOOP,                /* RC compare effect on TIOA: toggle. */
00351         .acpa     = TC_EVT_EFFECT_NOOP,                /* RA compare effect on TIOA: toggle (other possibilities are none, set and clear). */
00352 
00353         .wavsel   = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,/* Waveform selection: Up mode without automatic trigger on RC compare. */
00354         .enetrg   = FALSE,                             /* External event trigger enable. */
00355         .eevt     = 0,                                 /* External event selection. */
00356         .eevtedg  = TC_SEL_NO_EDGE,                    /* External event edge selection. */
00357         .cpcdis   = FALSE,                             /* Counter disable when RC compare. */
00358         .cpcstop  = FALSE,                             /* Counter clock stopped with RC compare. */
00359 
00360         .burst    = FALSE,                             /* Burst signal selection. */
00361         .clki     = FALSE,                             /* Clock inversion. */
00362         .tcclks   = TC_CLOCK_SOURCE_TC3                /* Internal source clock 3. */
00363         };
00364 
00365         tc_interrupt_t tc_interrupt =
00366         {
00367             .etrgs=0,
00368             .ldrbs=0,
00369             .ldras=0,
00370             .cpcs =1,
00371             .cpbs =0,
00372             .cpas =0,
00373             .lovrs=0,
00374             .covfs=0,
00375         };
00376 
00377     #endif
00378 
00379     /* Disable all interrupt/exception. */
00380     portDISABLE_INTERRUPTS();
00381 
00382     /* Register the compare interrupt handler to the interrupt controller and
00383     enable the compare interrupt. */
00384 
00385     #if( configTICK_USE_TC==1 )
00386     {
00387         INTC_register_interrupt((__int_handler)&vTick, configTICK_TC_IRQ, AVR32_INTC_INT0);
00388 
00389         /* Initialize the timer/counter. */
00390         tc_init_waveform(tc, &waveform_opt);
00391 
00392         /* Set the compare triggers.
00393         Remember TC counter is 16-bits, so counting second is not possible!
00394         That's why we configure it to count ms. Set Rc to the right value with
00395         rounding. */
00396         tc_write_rc( tc, configTICK_TC_CHANNEL, ( configPBA_CLOCK_HZ + 4 * configTICK_RATE_HZ ) /
00397                                                 ( 8 * configTICK_RATE_HZ ) );
00398 
00399         tc_configure_interrupts( tc, configTICK_TC_CHANNEL, &tc_interrupt );
00400 
00401         /* Start the timer/counter. */
00402         tc_start(tc, configTICK_TC_CHANNEL);
00403     }
00404     #else
00405     {
00406         INTC_register_interrupt((__int_handler)&vTick, AVR32_CORE_COMPARE_IRQ, AVR32_INTC_INT0);
00407         prvScheduleFirstTick();
00408     }
00409     #endif
00410 }

void* pvPortRealloc ( void *  pv,
size_t  xWantedSize 
)

Definition at line 167 of file IAR/AVR32_UC3/port.c.

References vTaskSuspendAll(), and xTaskResumeAll().

00168 {
00169 void *pvReturn;
00170 
00171     vTaskSuspendAll();
00172     {
00173         pvReturn = realloc( pv, xWantedSize );
00174     }
00175     xTaskResumeAll();
00176 
00177     return pvReturn;
00178 }

portSTACK_TYPE* pxPortInitialiseStack ( portSTACK_TYPE *  pxTopOfStack,
pdTASK_CODE  pxCode,
void *  pvParameters 
)

Definition at line 258 of file IAR/AVR32_UC3/port.c.

References portINITIAL_SR, portINSTRUCTION_SIZE, portNO_CRITICAL_NESTING, and portSTACK_TYPE.

Referenced by prvInitialiseTaskLists().

00259 {
00260     /* Setup the initial stack of the task.  The stack is set exactly as
00261     expected by the portRESTORE_CONTEXT() macro. */
00262 
00263     /* When the task starts, it will expect to find the function parameter in R12. */
00264     pxTopOfStack--;
00265     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x08080808;                    /* R8 */
00266     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x09090909;                    /* R9 */
00267     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0A0A0A0A;                    /* R10 */
00268     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x0B0B0B0B;                    /* R11 */
00269     *pxTopOfStack-- = ( portSTACK_TYPE ) pvParameters;                  /* R12 */
00270     *pxTopOfStack-- = ( portSTACK_TYPE ) 0xDEADBEEF;                    /* R14/LR */
00271     *pxTopOfStack-- = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; /* R15/PC */
00272     *pxTopOfStack-- = ( portSTACK_TYPE ) portINITIAL_SR;                /* SR */
00273     *pxTopOfStack-- = ( portSTACK_TYPE ) 0xFF0000FF;                    /* R0 */
00274     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x01010101;                    /* R1 */
00275     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x02020202;                    /* R2 */
00276     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x03030303;                    /* R3 */
00277     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x04040404;                    /* R4 */
00278     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x05050505;                    /* R5 */
00279     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x06060606;                    /* R6 */
00280     *pxTopOfStack-- = ( portSTACK_TYPE ) 0x07070707;                    /* R7 */
00281     *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_NESTING;         /* ulCriticalNesting */
00282 
00283     return pxTopOfStack;
00284 }

void SCALLYield ( void   ) 

Definition at line 211 of file IAR/AVR32_UC3/port.c.

References portRESTORE_CONTEXT_SCALL, portSAVE_CONTEXT_SCALL, and vTaskSwitchContext().

00212 {
00213     /* Save the context of the interrupted task. */
00214     portSAVE_CONTEXT_SCALL();
00215     vTaskSwitchContext();
00216     portRESTORE_CONTEXT_SCALL();
00217 }

void vPortEndScheduler ( void   ) 

Definition at line 301 of file IAR/AVR32_UC3/port.c.

Referenced by vTaskEndScheduler().

00302 {
00303     /* It is unlikely that the AVR32 port will require this function as there
00304     is nothing to return to.  */
00305 }

void vPortEnterCritical ( void   ) 

Definition at line 225 of file IAR/AVR32_UC3/port.c.

References portDISABLE_INTERRUPTS, and ulCriticalNesting.

00226 {
00227     /* Disable interrupts */
00228     portDISABLE_INTERRUPTS();
00229 
00230     /* Now interrupts are disabled ulCriticalNesting can be accessed
00231      directly.  Increment ulCriticalNesting to keep a count of how many times
00232      portENTER_CRITICAL() has been called. */
00233     ulCriticalNesting++;
00234 }

void vPortExitCritical ( void   ) 

Definition at line 238 of file IAR/AVR32_UC3/port.c.

References portENABLE_INTERRUPTS, portNO_CRITICAL_NESTING, and ulCriticalNesting.

00239 {
00240     if(ulCriticalNesting > portNO_CRITICAL_NESTING)
00241     {
00242         ulCriticalNesting--;
00243         if( ulCriticalNesting == portNO_CRITICAL_NESTING )
00244         {
00245             /* Enable all interrupt/exception. */
00246             portENABLE_INTERRUPTS();
00247         }
00248     }
00249 }

static void vTick ( void   )  [static]

Definition at line 186 of file IAR/AVR32_UC3/port.c.

References portENTER_CRITICAL, portEXIT_CRITICAL, portRESTORE_CONTEXT_OS_INT, portSAVE_CONTEXT_OS_INT, prvClearCcInt(), and vTaskIncrementTick().

00187 {
00188     /* Save the context of the interrupted task. */
00189     portSAVE_CONTEXT_OS_INT();
00190 
00191     #if( configTICK_USE_TC==1 )
00192         /* Clear the interrupt flag. */
00193         prvClearTcInt();
00194     #else
00195         /* Clear the interrupt flag. */
00196         prvClearCcInt();
00197     #endif
00198 
00199     /* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
00200     calls in a critical section . */
00201     portENTER_CRITICAL();
00202         vTaskIncrementTick();
00203     portEXIT_CRITICAL();
00204 
00205     /* Restore the context of the "elected task". */
00206     portRESTORE_CONTEXT_OS_INT();
00207 }

portBASE_TYPE xPortStartScheduler ( void   ) 

Definition at line 287 of file IAR/AVR32_UC3/port.c.

References portRESTORE_CONTEXT, and prvSetupTimerInterrupt().

Referenced by vTaskStartScheduler().

00288 {
00289     /* Start the timer that generates the tick ISR.  Interrupts are disabled
00290     here already. */
00291     prvSetupTimerInterrupt();
00292 
00293     /* Start the first task. */
00294     portRESTORE_CONTEXT();
00295 
00296     /* Should not get here! */
00297     return 0;
00298 }

Variable Documentation

volatile unsigned portLONG ulCriticalNesting = 9999UL

Definition at line 94 of file IAR/AVR32_UC3/port.c.

Generated on Thu Dec 17 20:02:01 2009 for AVR32 UC3 - FreeRTOS Real Time Kernel by  doxygen 1.5.5